New Delhi, Sept 24 (INB) Researchers at IIT Delhi have developed a working, demonstrable indigenously designed micro-Graphics Processing Unit (micro-GPU), which the institute on Thursday said could help reduce dependence on imported GPUs for embedded applications. According to IIT Delhi, the micro-GPU is the first working, demonstrable indigenously designed micro-GPU developed by a university in India, to the best of the researchers’ knowledge. The project was led by M.Tech students Nammi Akash and M Ravi Teja under the guidance of Prof Jayadeva and Prof Kaushik Saha of the Electrical Engineering Department. The team developed a programmable graphics-rendering system using a custom floating-point GPU engine implemented in Register Transfer Language (RTL) and mapped to a Spartan-7 Field Programmable Gate Array (FPGA) platform, the institute said. The hardware architecture is a scalable programmable graphics processor intellectual property (IP) that can be used for applications such as industrial control displays, low-cost human-machine interfaces, e-rickshaw dashboard navigators, inland-water navigation terminals, educational e-book readers and other embedded visualisation systems. The architecture can potentially be implemented on silicon through an Application-Specific Integrated Circuit (ASIC) or on programmable hardware such as FPGAs, IIT Delhi said. “Our objective was to create a compact but genuinely programmable graphics-processing architecture suitable for FPGA implementation and future ASIC realization,” Akash and Ravi Teja said in a joint statement. The researchers are now exploring an 8-16 core vector-style graphics processor architecture with an optimised compiler and graphics software toolchain. They also plan to explore a proof of concept using a 65-nanometre ASIC process node. Prof Jayadeva said the work demonstrated the research and educational potential of indigenous programmable graphics hardware for affordable computing platforms, while Prof Kaushik Saha said the project brought together arithmetic hardware, programmable architectures, compilers and embedded-systems design. The team plans to seek funding for ASIC development, system integration and eventual commercialisation of the technology, the institute said.
